Homepage of Rashid Zia Khan

Biography of Rashid Zia Khan

                                        RASHID ZIA KHAN

 

112 Brooke Drive,                                                                                  (610) 792-2608 (Home)

Royersford, PA 19468                                                                                  (267) 738-8985 (Cell)

Email: r_z_khan@msn.com

 

                                                             EXPERIENCE

 

InterDigital Communications Corporation               King of Prussia, Pennsylvania   

                                                                                                                                                                                                                                 

           11/00-4/04                                Senior DSP Engineer

 

·                     Designed 3G (Third Generation) CDMA FDD (Frequency Division Duplex) wireless modem layer 1 controller C hardware device drivers for the receiver front-end AGC & AFC blocks.

 

·                     Designed sleep timer C hardware device driver for a 3G (Third Generation) CDMA TDD (Time Division Duplex) wireless modem.

 

·                     Designed a digital signal processing C software unit test bench for verification of a 3G (Third Generation) CDMA TDD wireless modem’s automatic frequency control HW block using Mentor Graphic’s HW/SW co-verification synthesis tool.

 

·                     Designed C language software modules for a CoWare based physical layer system simulation model of a 3G (Third Generation) wireless modem including a timing manager, application programming interface command interpreter and test scripts for physical layer functionality verification/regression testing.

 

DeVry Institute                                                                 North Brunswick, New Jersey

 

          3/00-10/00                              Assistant Professor

 

·                     Taught courses in basic electronic communications, introductory microprocessors, basic engineering mathematics and introductory electric circuits.

 

ITT Aerospace/Communications Division                     Clifton, New Jersey

 

          3/98-10/99                              Senior Engineer

 

·                     Designed selected embedded digital signal processing assembly language software modules for military digital SINCGARS radio and generated radio product test plans.

 

Ariel Corporation                                                             Cranbury, New Jersey

 

          9/97-3/98                                                                  Digital Signal Processing Engineer

 

·                     Converted embedded digital signal processing assembly language software modules to C language modules for an ITU V.34 modem product.

 

·                     Designed preliminary PC based C simulation software for a voice-band T1 network echo canceller.

 

 

 

Hewlett-Packard Company                                  Santa Rosa, California

 

         8/96-9/97                                                                      Software Design Engineer

 

·                     Integrated and fine-tuned C language embedded digital signal processing software modules as part of a wireless measurement instrument’s CDMA IS-95 radio frequency signal parameters measurement firmware.

 

AT&T Bell Laboratories                                            Middletown, New Jersey

 

        2/88 - 7/96                                                    Member of Technical Staff Level - I

 

·                     Designed and unit tested selected embedded digital signal processing transmitter/receiver assembly language software modules for 2-wire switched telephone network QAM, QPSK, BPSK, and FSK modems. Designed test scripts for modem transmission layer control interface verification as well as provided continuing engineering support for various modem platforms all as part of a long-term ITU v.34/v.32bis/v.32/v.22bis/v.22/v.23/Bell 103 modem chip set development project.

 

·                     Modified and integrated pre-existing embedded digital signal processing software modules in both C and assembly languages for a T1 network switch voice quality improvement DSP circuit pack.

 

·                     Developed PC based C firmware interface control verification software and designed a C module for secure software object code delivery to internal business unit customers.

 

·                     Developed 4-wire analog leased line modem embedded digital signal processing assembly language software for non-disruptive circuit quality measurements such as gain hits, phase hits, phase jitter, impulse noise, and developed FORTRAN software for non-disruptive channel slope and envelope delay distortion measurements.

 

Alcatel Transcom                                                                       Portsmouth, Rhode Island

 

       11/85-12/87                                                                 Design Engineer

 

·                     Designed and unit tested digital signal processing assembly language software modules for software provisioning of telephone central office PCM channel units via intrusive subscriber loop circuit quality measurement tests.

 

·                     Fine-tuned and maintained echo cancellation digital signal processing software for a MFT (Metallic Facilities Terminal) adaptive voice frequency repeater.

 

                                                EDUCATION

           

         1/83-12/84                    University of Texas at Arlington

 

                        Master of Science in Electrical Engineering

 

         Thesis: Taylor Series Approximation of the Energy Spectral Density.

                        Supervising Professor: Dr. M. T. Manry

                                G. P. A.: 3.6 on a 4.0 scale

                                   

Courses: Non-Linear Signal Processing, Statistical Signal Processing, Digital Filtering, Spread Spectrum Communication Systems, Digital Communications 1&2, Information Transmission,

Speech Processing, Approximation Theory, Computer Simulation Techniques, Microprocessors,

Numerical Analysis

 

         7/79-12/82                   University of Texas at Arlington  

 

                       Bachelor of Science in Electrical Engineering

 

        Senior year project: FORTRAN simulation of the Routh-Hurwitz stability criterion

                                G. P. A.: 3.2 on a 4.0 scale

 

                                                MEMBERSHIPS

             

                                    Tau Beta Pi, Eta Kappa Nu, IEEE                                                  

 

                                           OPERATING SYSTEMS

 

        UNIX, MS-DOS, Windows 3.11, Windows NT, Windows 95, Windows XP, VAX/VMS

 

                                     PROGRAMMING EXPERIENCE

 

  C, MS Visual C++ (beginner), FORTRAN 77, Unix Shell (limited), Awk, Assemblers (AT&T

 DSP1610, AT&T DSP16A, ADSP21020, TI TMS32010/C25/C5x, NEC7720, Motorola 6800,

                                           Intel 8080, IBM 360/370)

 

                   SIMULATION & VERIFICATION TOOLS EXPERIENCE

 

CoWare, Mentor Graphic’s Seamless Co-Verification tool, familiarity with MATLAB (student 

                                                            version)

 

        DEVELOPMENT TOOLS & LABORATORY EQUIPMENT EXPERIENCE

 

DSP In-Circuit Emulators, Debuggers, Logic Analyzers, Spectrum Analyzers, Oscilloscopes

                                                  & Multi-Meters

 

             RECENT COURSES/SEMINARS TAKEN OR SKILLS ACQUIRED

 

  Attended a Net Seminar on "Designing PSoC Switch Capacitor Filters" sponsored by  

                                 Cypress Semiconductor - July 13, 2004.

 

Attended a Net Seminar on "High Performance DSP Designs with Low-Cost FPGAs" sponsored 

                           by Lattice Semiconductor - September 22, 2004.

 

Attended a National Instruments Symposium for Measurement and Control including hands-on 

       introduction to LabVIEW Graphical Development Environment in King of Prussia, PA in 

                                                        October, 2004.

 

                  CONFIGURATION MANAGEMENT TOOLS EXPERIENCE

 

                                              PVCS, Clear Case

 

                                               PERSONAL

         

                              Citizenship: United States of America                                         

                                                  

                                             REFERENCES

     

                                   Will be furnished on request